Experience

• Worked on designing a software hardware (PS-PL) framework with Zynq ultra-scale MPSoC and accelerated algorithms for a microsatellite.
• Reviewed papers for the DATE conference 2024 on computer architecture and EDA tools. Gave appropriate feedback to improve on these papers.
• Worked on pipelining kernels of the algorithm with no data dependency with Dynamic function exchange and Partial dynamic reconfiguration features offered by the Zynq Ultrascale+.
• Resolved bugs on the kernel, rootfs, drivers, device tree, deployed and tested openmp, fpga manager and utils on petalinux builds.
• Setup the MPSoC available across VPN by setting it up on the existing networking infrastructure at BSC enabling remote deployment, orchestration, build over tftp and debugging (over ethernet and Serial connections).
• Xilinx UltraScale MPSOC, Vitis & Vivado Development, PetaLinux, SDSoC & SDAccel Xilinx development, device tree configuration, Arm Cortex A53, Arm cortex R5, Kernel & rootfs build.

• Expanding upon the basics of routing and switching, got a chance to work on a variety of advanced technologies such as EVPN, Vxlan, GRE, IPSEC, MPLS, ISIS, PTP, Docker Products, VMware Products, etc as a Network Engineer.
• Provided solutions to various multi-vendor problems to a variety of customers ranging from cloud giants such as Facebook, and Microsoft; Trading firms like Tower research, NYSE, etc to ISPs where Arista devices are in place from the APAC and EMEA regions.
• Adapting to an organization's knowledge-sharing culture, inculcated and developed qualities such as teamwork, communicating tactically, presenting, and addressing wider audiences as a whole.
• Gained insight into several merchant silicon chips manufactured by Intel, Broadcom, etc., and proprietary architecture design of the Arista switches.

• Worked on designing a tool for efficient mapping of spiking neural networks on a neuromorphic chip (SENeCA).
• Compared optimization algorithms for single and multi-objective optimization, improving tool efficiency significantly.
• Published papers at HiPEAC and IEEE WCCI conferences.
• Gained expertise in hardware modeling, event-based simulator design, and spiking neural networks.
• Collaborated with IMEC on European projects TEMPO and ANDANTE.

• Mentored computer engineering and embedded systems students.
• Organized events to facilitate student interaction and learning.

• Worked on hardware modeling using machine learning for X-RAY systems.
• Supported by the Vivaldy EU project.

• Learned networking protocols and technologies.
• Worked on a project for dynamic detection of DDoS attacks.

• Worked on game theory and wireless communication models.
• Analyzed signal-to-noise ratio using MATLAB.

• Developed automation module for home network setup.
• Worked with Realtek and Mediatek wireless adapters.

(-) Worked with ATMEL microcontroller and AVR embedded C. (-) Contributed to projects involving sensory modules and robotics. </ul>